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By Ivanyi A. (ed.)

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Extra resources for Algorithms of informatics. Applications

Example text

Note that in the case of crash failures this validity condition is equivalent to requiring that every nonfaulty decision value is the input of some processor. Once a processor crashes it is of no interest to the algorithm, and no requirements are put on its decision. We begin by presenting a simple algorithm for consensus in a synchronous message passing system with crash failures. 4. 2. Consensus with crash failures Since the system is synchronous, an execution of the system consists of a series of rounds.

If a message m comes to processor pj then it enables event bc-recvj (m, i, bb). To provide reliability we do the following. We build the reliable broadcast on the top of basic broadcast service. When bc-sendi (m, rbb) occurs, processor pi enables event bc-sendi ( m, i , bb). If event bc-recvj ( m, i , k, bb) occurs and messagecoordinate m appears for the rst time then processor pj rst enables event bcsendj ( m, i , bb) (to inform other non-faulty processors about message m in case when processor pi is faulty), and next enables event bc-recvj (m, i, rbb).

We argue that (k1 , . . , kn ) is a consistent cut by way of contradiction. Suppose that the vector (k1 , . . , kn ) is an inconsistent cut. Then, by denition, there are processors pi and pj such that there is an instruction x of processor pi subsequent to instruction number ki , such that x happens before instruction number kj of processor pj . Recall that ki is the furthest entry of V Ti majorised by K . So entry ki + 1 is not majorised by K , and since all subsequent entries, including the one for instruction x, can have only larger coordinates, the entries are not majorised by K either.

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